1. Field of the Invention
This invention relates to a semiconductor memory, and in particular relates to a read circuit for nonvolatile memory using a ferroelectric memory device.
2. Description of the Related Art
Ferroelectric memory (FeRAM) is a memory which uses ferroelectric capacitors as memory cells, and is a nonvolatile memory which can retain stored information even when the power supply is turned off. Similarly to SRAM and other memory types, ferroelectric memory can write and read data rapidly and with low power consumption. For these reasons, ferroelectric memory is used widely in IC cards, game equipment, tag chips, and other storage media. Such ferroelectric memory is for example described in Japanese Patent Laid-open No. 2002-100183 and Japanese Patent Laid-open No. 2001-118380.
Ferroelectric memory stores data using the polarization action of ferroelectric capacitors. For example, during writing a positive voltage is applied to a ferroelectric capacitor to cause polarization in the positive direction and write a data “0”, or a negative voltage is applied to cause polarization in the negative direction and write a data “1”. During reading, a positive voltage is applied to a ferroelectric capacitor, and a capacitor in the data “0” state does not have the polarization direction inverted, whereas a capacitor in the data “1” state undergoes inversion of the polarization direction; according to the magnitude of the amount of charge in the current flowing in the bit line as a result (a small amount of charge for data “0”, a large amount of charge for data “1”), the potential of the bit line is set to a high level or to a low level (a high level for data “1”, a low level for data “0”).
Ferroelectric memory may be of the two-transistor, two-capacitor type, in which a memory cell consists of two transistors and two ferroelectric capacitors, or of the one-transistor, one-capacitor type, in which a memory cell consists of one transistor and one ferroelectric capacitor. In a two-transistor, two-capacitor memory cell, complementary data is recorded in the two capacitors, and during reading complementary signals are output to a bit line pair, and the complementary signals are detected by a sense amplifier. In a one-transistor, one-capacitor type memory cell, data is recorded in one capacitor, and during reading either a high level or a low level is output to a bit line, and a sense amplifier compares the bit line level with a reference level generated by a reference memory cell to detect the recorded data. In one-transistor, one-capacitor type memory, the circuit configuration of the memory cell is simple, but in a read operation it is necessary to perform comparison with the reference level of a reference memory cell, and there is a tendency for the detection margin to be small compared with the case of two-transistor, two-capacitor type memory.